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USB QRNG, chip or IP: choosing an integration path

Choose between a USB QRNG evaluation kit, a packaged chip and entropy-cell IP for your embedded design, with a practical checklist before integration.

QRNG evaluationembedded integrationUSB QRNG
VERA-Q USB quantum entropy evaluation kit
VERA-Q USB quantum entropy kit. Samples are available on request through shortlist access.

Choosing a quantum random number generator starts with the system you are building. A USB QRNG evaluation kit helps you investigate a host application and its entropy requirements. A packaged QRNG chip gives a board designer a discrete component to integrate. Entropy-cell IP puts the source inside a chip your team is designing.

Each path needs evidence about the entropy source and the surrounding system. The practical difference is which integration work your team owns, what you need to learn first, and how the hardware will reach your application.

Compare the three integration paths

PathUseful whenFirst decision
USB evaluationYou want to assess entropy in a host application before committing to a board design.Define the platform, workload and data you need to evaluate.
Packaged QRNG chipYour PCB needs a discrete physical entropy source.Review package, electrical integration and host requirements.
Entropy-cell IPYour team is designing an MCU, processor or secure SoC.Discuss the target process, implementation constraints and assessment responsibilities.

A useful first enquiry identifies the path you are considering and the engineering question you need the evaluation to answer. That could be application integration, board-level constraints or the feasibility of an IP implementation.

Start with USB when you need to evaluate an application

A USB evaluation can help a software, security or hardware team establish how a physical entropy source fits into an existing workflow. Define the host environment, the way your application consumes randomness and the behaviour you need to observe during startup and continued operation.

For iQrypto’s evaluation family, VERA-T is the classical TRNG option and is available; VERA-Q uses a quantum entropy source and is available on a shortlist basis, with samples on request. Evaluation kits may be purchased or loaned depending on volume and business case. Discuss the appropriate model and arrangement with the team.

Set out whether you need application-level output, diagnostic information or source data for an entropy assessment. Agree the data access and test conditions for the proposed hardware revision before planning a measurement campaign.

The VERA evaluation page explains the current options. A USB evaluation also gives you a place to define the questions that will carry into a later chip or IP integration.

Choose a packaged QRNG chip for board integration

An embedded design with its own PCB may need a discrete entropy component close to the system that uses it. The board-level review should cover the electrical interface, power supply, reset and startup behaviour, operating conditions, health status and the way the host handles source errors.

Keep the die and package dimensions separate in your layout discussion. iQrypto’s QRNG die is 1.5 × 1.5 mm; its on-demand QFN package has a 5 × 5 mm footprint. The chip uses electron shot noise in standard CMOS and has a stated whole-chip power below 15 mW.

For a proposed design, confirm the package and connection details, the host integration requirements, the test coverage you need and the requested quantity. Supply and lead time are discussed for the application.

The QRNG chip page contains the current specifications. Include enough information about your board and intended use to make that technical discussion specific.

Discuss entropy-cell IP when you own the chip design

IP integration suits a team that wants the entropy source inside its own silicon. It brings process, implementation and verification questions into the chip-design project: how the source is integrated, how its operating conditions are controlled, and how the completed device will expose status and support assessment.

The iQrypto IoT-class integration block is 100 × 100 µm. The individual noise cell is under 5 µm. Use the integration-block figure when discussing implementation area, and agree the requirements for the target design with the team.

An IP discussion should establish the target process, device constraints, intended entropy demand and responsibilities for integration, health monitoring and evaluation. The entropy-cell IP page gives the product context for that conversation.

Evaluate the entropy chain and the system together

QRNG, TRNG and deterministic random number generation describe different aspects of a randomness system. A physical source supplies entropy. Software can use that entropy within a deterministic generator to serve the application’s random-number requests. Identify the source, any conditioning, and the system output you are measuring.

NIST SP 800-90B addresses entropy sources, SP 800-90A describes deterministic random bit generators, and SP 800-90C describes constructions that bring the relevant components together. Those documents help structure questions about the complete design.

For a practical evaluation, record:

  • The measurement point. Identify raw source data, conditioned output or application-level output.
  • The source evidence. Review the physical model, entropy assessment, health tests and operating conditions.
  • The system response. Define startup, restart and source-error behaviour for the host application.
  • The workload. Record sustained demand, bursts and any latency constraints.

Use units that match the measurement. A sample rate needs a stated sample definition and measurement point before it can support a bit-rate comparison. iQrypto’s published VERA-Q figure is at least 30 MSps, or million samples per second. Keep that unit when discussing the kit’s output.

Our product figures include an internal NIST SP 800-90B assessment. Formal SP 800-90B validation and AIS 31 readiness remain on the roadmap. Agree which evidence your project requires and what can be reviewed for the proposed device.

Prepare a useful evaluation enquiry

Bring the system constraints into the first conversation:

  1. Your intended application and whether you are evaluating a host, a PCB or a new chip design.
  2. The platform, interface and operating environment.
  3. The data and measurement points you need for the evaluation.
  4. Expected entropy demand, including startup or burst behaviour.
  5. Intended quantities, project timing and the questions the team needs to resolve.

Use the integration guide to develop that brief. For a deeper explanation of the physical source, read how the entropy cell works. QRNG.io provides the accompanying educational material on generator types and evaluation methods; the product pages above describe iQrypto’s current offering.

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